rp2040

RP2040 Programming without SDK
Log | Files | Refs
commit 9ce7aad1fee51b5b2c87f965dbaa3c9ffe0cad4e
parent 11b13529567ab1195ab0affefbf51e5c222748f2
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Sat, 24 Feb 2024 07:26:52 +0900

delete head

Diffstat:

Dhead/Makefile | 36------------------------------------


Dhead/boot2.s | 68--------------------------------------------------------------------


Dhead/flash.s | 108-------------------------------------------------------------------------------


Dhead/mach.s | 332-------------------------------------------------------------------------------


Dhead/main.c | 29-----------------------------


Dhead/mc.s | 89-------------------------------------------------------------------------------


Dhead/memmap.ld | 20--------------------


7 files changed, 0 insertions(+), 682 deletions(-)

diff --git a/head/Makefile b/head/Makefile
@@ -1,36 +0,0 @@
-AS = arm-none-eabi-as
-LD = arm-none-eabi-ld
-CC = arm-none-eabi-gcc
-OBJCOPY = arm-none-eabi-objcopy
-BINCRC = ../tools/bincrc
-BIN2UF2 = ../tools/bin2uf2
-
-MCPU = -mcpu=cortex-m0plus
-ASFLAGS = $(MCPU)
-CFLAGS = $(MCPU) -ffreestanding -nostartfiles -O0 -fpic -mthumb -c
-LDFLAGS = --no-relax -nostdlib
-
-all: led.uf2
-
-clean:
-	rm -f *.o *.elf *.uf2 *.bin
-
-.c.o:
-	$(CC) $(CFLAGS) -o $@ $<
-
-.s.o:
-	$(AS) $(ASFLAGS) -o $@ $<
-
-led.elf: boot2.o flash.o main.o mach.o memmap.ld
-	$(LD) $(LDFLAGS) -o $@ -T memmap.ld boot2.o flash.o mach.o main.o 
-
-led.bin: led.elf
-	$(OBJCOPY) -O binary led.elf $@
-
-led.uf2: led.bin
-	$(BINCRC) led.bin led_crc.bin
-	$(BIN2UF2) led_crc.bin $@
-
-flash: led.uf2
-	mount /dev/disk/by-label/RPI-RP2 /mnt
-	cp led.uf2 /mnt
diff --git a/head/boot2.s b/head/boot2.s
@@ -1,68 +0,0 @@
-.cpu cortex-m0plus
-.thumb
-
-	.section .boot2
-	.global setup_xip
-	.thumb_func
-setup_xip:
-	push {r4, lr}
-
-	// setup QSPI pad
-	ldr r4, pads_qspi_base
-	ldr r1, =(0 << 4 | 0 << 1 | 1) // 2mA, schmitt off, slew fast
-	str r1, [r4, #0x4] // PADS_QSPI: GPIO_QSPI_SCLK
-
-	ldr r4, rom_base
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('C' | 'X' << 8) // _flash_enter_cmd_xip()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	// this code should be rewritten using dma.
-	ldr r2, boot2_end
-	ldr r3, sram_base
-	ldr r0, etext
-	sub r0, r0, r3
-	add r0, #3
-	lsr r0, #2
-sram_cpy:
-	ldr r1, [r2, #0]
-	str r1, [r3, #0]
-	add r2, r2, #0x4
-	add r3, r3, #0x4
-	sub r0, r0, #0x1
-	bne sram_cpy
-
-	// exit from boot2
-	pop {r4}
-	pop {r0}
-	cmp r0, #0
-	beq initial_boot
-	bx r0
-initial_boot:
-	ldr r0, sram_base
-	ldr r1, m0plus_vtor 
-	str r0, [r1, #0] // M0PLUS: VTOR
-	ldr r1, [r0, #4] // entry point
-	ldr r0, [r0, #0] // stack pointer
-	mov sp, r0
-	bx r1
-
-	.align 2
-rom_base:
-	.word 0x00000000
-boot2_end:
-	.word 0x10000000 + 0x100
-sram_base:
-	.word 0x20000000
-pads_qspi_base:
-	.word 0x40020000
-m0plus_vtor:
-	.word 0xe0000000 + 0xed08
-etext:
-	.word _etext
-literals:
-	.ltorg
-
diff --git a/head/flash.s b/head/flash.s
@@ -1,108 +0,0 @@
-.cpu cortex-m0plus
-.thumb
-
-	.section .text
-	.global frerase
-	// void frerase(uint32_t ofs, size_t size);
-	// erase the region of flash starting at ofs and size bytes long in size.
-	// ofs must be aligned in 4K and size must be multiple of 4K
-frerase:
-	push {r4, r5, r6, r7, lr}
-
-	ldr r4, rom_base
-	mov r5, r0
-	mov r6, r1
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('I' | 'F' << 8) // _connect_internal_flash()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('E' | 'X' << 8) // _flash_exit_xip()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('R' | 'E' << 8) // _flash_range_erase()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	mov r7, r0
-	mov r0, r5
-	mov r1, r6
-	mov r2, #1
-	lsl r2, r2, #16 // 64K
-	mov r3, #0xd8   // block erase
-	blx r7
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('F' | 'C' << 8) // _flash_flush_cache()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('C' | 'X' << 8) // _flash_enter_cmd_xip()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	pop {r4, r5, r6, r7, pc}
-
-	.global frprog
-	// void frprog(uint32_t ofs, uint8_t *data, size_t count);
-	// ofs must be aligned in 256 and data must be multiple of 256
-frprog:
-	push {r4, r5, r6,r7, lr}
-
-	ldr r4, rom_base
-	mov r5, r0
-	mov r6, r1
-	mov r7, r2
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('I' | 'F' << 8) // _connect_internal_flash()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('E' | 'X' << 8) // _flash_exit_xip()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('R' | 'P' << 8) // _flash_range_program()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	mov r3, r0
-	mov r0, r5
-	mov r1, r6
-	mov r2, r7
-	blx r3
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('F' | 'C' << 8) // _flash_flush_cache()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	ldrh r0, [r4, #0x14] // rom_func_table
-	ldr r1, =('C' | 'X' << 8) // _flash_enter_cmd_xip()
-	ldrh r2, [r4, #0x18] // rom_table_lookup
-	blx r2
-	blx r0
-
-	pop {r4, r5, r6, r7, pc}
-
-	.align 2
-rom_base:
-	.word 0x00000000
-xip_base:
-	.word 0x10000000
-sram_base:
-	.word 0x20000000
-
diff --git a/head/mach.s b/head/mach.s
@@ -1,332 +0,0 @@
-.cpu cortex-m0plus
-.thumb
-
-	.section .vectors
-vectors:
-	.word 0x20040000 // initial SP
-	.word (reset+1)  // entry point
-
-	.section .text
-	.thumb_func
-reset:
-	bl main
-hang:
-	b hang
-
-	.global init
-	.thumb_func
-init:
-	push {r4, r5, lr}
-	// unreset gpio and pll_sys and uart0
-	mov r1, #1
-	lsl r0, r1, #5 // io_bank0
-	lsl r1, r1, #12 // pll_sys
-	add r0, r0, r1
-	lsl r1, r1, #10 // uart0
-	add r0, r0, r1
-	bl unreset
-	bl wait_unreset
-
-	// set gpio functions
-	ldr r0, io_bank0_base
-	mov r1, #2 // uart0
-	mov r2, #5 // sio
-	add r0, r0, #0x4 // io_bank0_gpio0_ctrl
-	str r1, [r0, #0] // uart0
-	add r0, r0, #0x8 // #0xc io_bank0_gpio1_ctrl
-	str r1, [r0, #0] // uart0
-	add r0, r0, #0xa8 // #0xb4 io_bank0_gpio22_ctrl
-	str r2, [r0, #0] // sio
-	add r0, r0, #0x10 // #0xc4 io_bank0_gpio24_ctrl
-	str r2, [r0, #0] // sio
-
-	// enable gpio output
-	ldr r0, sio_base
-	mov r1, #5
-	lsl r1, r1, #22 // gpio22 and gpio24
-	str r1, [r0, #0x24]
-
-	// enable xosc
-	ldr r0, xosc_base
-	mov r1, #0xf
-	lsl r1, r1, #8
-	add r1, r1, #0xab
-	lsl r1, r1, #8
-	add r1, r1, #0xaa
-	lsl r1, r1, #4
-	str r1, [r0, #0] // XOSC_CTRL
-
-	// set xosc delay
-	mov r1, #47
-	str r1, [r0, #0xc] // XOSC_STARTUP
-
-	// wait for xosc startup
-xosc_stable:
-	ldr r1, [r0, #0x4] // XOSC_STATUS
-	lsr r1, r1, #31
-	beq xosc_stable
-
-	// set pll feedback divider
-	ldr r0, pll_sys_base
-	mov r1, #125
-	str r1, [r0, #0x8] // PLL_FBDIV_INT
-
-	// power on pll
-	ldr r1, atomic_clr
-	add r0, r0, r1
-	mov r1, #33 // VCOPD | PD
-	str r1, [r0, #0x4] // PLL_PWR
-
-	// wait for pll locking
-	ldr r0, pll_sys_base
-pll_lock:
-	ldr r1, [r0, #0] // PLL_CS
-	lsr r1, r1, #31
-	beq pll_lock
-
-	// set post dividers
-	ldr r0, pll_sys_base
-	ldr r1, atomic_clr
-	add r0, r0, r1
-	mov r1, #3
-	lsl r1, r1, #4
-	add r1, r1, #4
-	lsl r1, r1, #12
-	str r1, [r0, #0xc] // PLL_PRIM
-
-	// turn on post dividers
-	ldr r0, pll_sys_base
-	ldr r1, atomic_clr
-	add r0, r0, r1
-	mov r1, #8
-	str r1, [r0, #0x4] // PLL_PWR
-
-	// set sys clock to pll_sys
-	ldr r0, clocks_base
-	mov r1, #1
-	str r1, [r0, #0x3c] // CLOCKS_CLK_SYS_CTRL
-	// enable clk_peri
-	lsl r1, r1, #11
-	str r1, [r0, #0x48]
-
-	// enable clk_peri
-	ldr r0, clocks_base
-	mov r1, #1
-	lsl r1, r1, #11
-	str r1, [r0, #0x48] // CLOCKS_CLK_PERI_CTRL
-	
-	// enable uart0
-	ldr r0, uart0_base
-	ldr r1, atomic_set
-	add r0, r0, r1
-	mov r1, #1
-	str r1, [r0, #0x30] // UART0_UARTCR
-	// enable FIFO
-	lsl r1, r1, #4
-	str r1, [r0, #0x2c] // UART0_UARTLCR_H
-	// set baud rate dividers
-	mov r1, #67
-	str r1, [r0, #0x24] // UART0_UARTIBRD
-	mov r1, #52
-	str r1, [r0, #0x28] // UART0_UARTFBRD
-	// setup uart0
-	mov r1, #3 // WLEN = 8
-	lsl r1, r1, #5
-	str r1, [r0, #0x2c] // UART0_UARTLCR_H
-
-	pop {r4, r5, pc}
-
-unreset:
-	// unreset subsystems specified by r0
-	// args: bit mask to specify the subsystems to unreset
-	// return: the bit mask same as the arg
-	ldr r1, resets_base
-	ldr r2, atomic_clr
-	add r1, r1, r2
-	str r0, [r1, #0] // RESETS_RESET
-	bx lr
-
-wait_unreset:
-	// wait for subsystems specified by r0 to reset done
-	// args: bit mask to specify the subsystems to wait for
-	// return: void
-	ldr r1, resets_base
-reset_chk:
-	ldr r2, [r1, #0x8] // RESETS_RESET_DONE
-	and r0, r0, r2
-	beq reset_chk
-	bx lr
-
-	.global putchar
-putchar:
-uart0_write:
-	push {r4, r5, r6, r7, lr}
-	mov r4, #0xFF
-	and r4, r4, r0
-	ldr r5, uart0_base
-	mov r6, #32 // TXFF
-uart0_txff:
-	ldr r7, [r5, #0x18] // UART0_UARTFR
-	and r7, r7, r6
-	bne uart0_txff
-	str r4, [r5, #0] // UART0_UARTDR
-	pop {r4, r5, r6, r7, pc}
-
-	.global getchar
-getchar:
-uart0_read:
-	push {r4, r5, r6, lr}
-	ldr r4, uart0_base
-	mov r5, #16
-uart0_rxfe:
-	ldr r6, [r4, #0x18] // UART0_UARTFR
-	and r6, r6, r5
-	bne uart0_rxfe
-	ldr r0, [r4, #0] // UART0_UARTDR
-	mov r4, #0xFF
-	and r0, r0, r4
-	pop {r4, r5, r6, pc}
-
-	.global print
-	// void print(char *);
-print:
-	push {r4, r5, lr}
-	mov r4, r0
-	mov r5, #0xFF
-print_loop:
-	ldrb r1, [r4, #0]
-	and r1, r1, r5
-	beq print_end
-	mov r0, r1
-	bl uart0_write
-	add r4, r4, #1
-	b print_loop
-print_end:
-	pop {r4, r5, pc}
-
-	.global printh
-	// void printh(uint32_t);
-	// print in hex
-printh:
-	push {r4, r5, r6, lr}
-	mov r4, r0
-	mov r5, #0xF
-	mov r6, #28
-printh_loop:
-	mov r0, r4
-	lsr r0, r0, r6
-	and r0, r0, r5
-	cmp r0, #10
-	blt printh_low
-	add r0, #'A' - 10
-	b printh_high
-printh_low:
-	add r0, #'0'
-printh_high:
-	bl putchar
-	sub r6, r6, #4
-	bge printh_loop
-	pop {r4, r5, r6, pc}
-
-
-	.global ldr
-	// uint32_t ldr(uint32_t addr)
-	// load content at addr
-ldr:
-	ldr r0, [r0, #0]
-	bx lr
-	
-
-
-led_pr:
-	// print register with 2 leds
-	push {r0, r1, r2, r4, lr}
-	mov r4, r0
-	mov r1, #32
-led_pr_loop:
-	mov r2, #1
-	and r2, r2, r4
-	beq led_pr_0
-	bl led_p1
-	b led_pr_1
-led_pr_0:
-	bl led_p0
-led_pr_1:
-	lsr r4, r4, #1
-	sub r1, #1
-	bne led_pr_loop
-	pop {r0, r1, r2, r4, pc}
-
-led_p0:
-	// blink led on gpio22
-	push {r0, lr}
-	mov r0, #1
-	lsl r0, r0, #22
-	bl led_blink
-	pop {r0, pc}
-
-led_p1:
-	// blink led on gpio24
-	push {r0, lr}
-	mov r0, #1
-	lsl r0, r0, #24
-	bl led_blink
-	pop {r0, pc}
-
-	.global led_p2
-led_p2:
-	// blink led on gpio22 and gpio24
-	push {r0, lr}
-	mov r0, #5
-	lsl r0, r0, #22
-	bl led_blink
-	pop {r0, pc}
-
-led_blink:
-	push {r0, r4, r5, lr}
-	ldr r4, sio_base
-	mov r5, r0
-	str r5, [r4, #0x10] // SIO_GPIO_OUT_SET
-	bl delay
-	str r5, [r4, #0x18] // SIO_GPIO_OUT_CLR
-	bl delay
-	pop {r0, r4, r5, pc}
-
-	.global delay
-delay:
-	push {r0}
-	mov r0, #1
-	lsl r0, r0, #22
-del_loop:
-	sub r0, r0, #1
-	bne del_loop
-	pop {r0}
-	bx lr
-
-// data
-
-	.align 2
-atomic_set:
-	.word 0x00002000
-atomic_clr:
-	.word 0x00003000
-xip_ssi_base:
-	.word 0x18000000
-clocks_base:
-	.word 0x40008000
-resets_base:
-	.word 0x4000c000
-reset_done:
-	.word 0x4000c008
-io_bank0_base:
-	.word 0x40014000
-xosc_base:
-	.word 0x40024000
-pll_sys_base:
-	.word 0x40028000
-uart0_base:
-	.word 0x40034000
-rosc_base:
-	.word 0x40060000
-sio_base:
-	.word 0xd0000000
diff --git a/head/main.c b/head/main.c
@@ -1,29 +0,0 @@
-#include <stdint.h>
-#include <stddef.h>
-
-extern void init(void);
-extern void led_p2(void);
-extern void frerase(uint32_t, size_t);
-extern void frprog(uint32_t, uint8_t *, size_t);
-extern uint32_t ldr(uint32_t);
-extern void printh(uint32_t);
-extern void putchar(char);
-
-int
-main(void)
-{
-	uint32_t ofs = 4 * 1024;
-	size_t size = 4 * 1024;
-	size_t count = 256;
-	uint8_t data[count];
-	for (int i = 0; i < count; i++)
-		data[i] = 0xde;
-	init();
-	frerase(ofs, size);
-	frprog(ofs, data, count);
-	printh(ldr(0x10001000));
-	putchar('\n');
-	while(1) {
-		led_p2();
-	}
-}
diff --git a/head/mc.s b/head/mc.s
@@ -1,89 +0,0 @@
-	.global mcfork // int mcfork(void)
-mcfork:
-	push {r4, lr}
-	ldr r0, =0x20000800
-	mov r1, lr
-	str r1, [r0, #0]
-mcfork_retry:
-	bl mc_fifo_drain
-	mov r0, #0
-	bl mc_fifo_send
-	bl mc_fifo_recv
-	cmp r0, #0
-	bne mcfork_retry
-
-	bl mc_fifo_drain
-	mov r0, #0
-	bl mc_fifo_send
-	bl mc_fifo_recv
-	cmp r0, #0
-	bne mcfork_retry
-
-	mov r0, #1
-	bl mc_fifo_send
-	bl mc_fifo_recv
-	cmp r0, #1
-	bne mcfork_retry
-
-	ldr r0, =0x10000100 // __vectors
-	mov r4, r0
-	bl mc_fifo_send
-	bl mc_fifo_recv
-	cmp r0, r4
-	bne mcfork_retry
-
-	ldr r0, =0x200007fc // initial sp
-	mov r4, r0
-	bl mc_fifo_send
-	bl mc_fifo_recv
-	cmp r0, r4
-	bne mcfork_retry
-
-	adr r0, mcfork_ent
-	add r0, r0, #1 // thumb mode
-	mov r4, r0
-	bl mc_fifo_send
-	bl mc_fifo_recv
-	cmp r0, r4
-	bne mcfork_retry
-	.align 2
-mcfork_ent: // this part doesn't work for cpu1
-	ldr r0, sio_base
-	ldr r0, [r0, #0]
-	pop {r4, pc}
-
-mc_fifo_drain:
-	ldr r0, sio_base
-mc_fifo_not_empty:
-	ldr r1, [r0, #0x50] // SIO_FIFO_ST
-	mov r2, #1
-	and r1, r2
-	beq mc_fifo_empty
-	ldr r3, [r0, #0x58] // SIO_FIFO_RD
-	b mc_fifo_not_empty
-mc_fifo_empty:
-	sev
-	bx lr
-
-mc_fifo_send:
-	ldr r1, sio_base
-mc_fifo_full:
-	ldr r2, [r1, #0x50] // SIO_FIFO_ST
-	mov r3, #2
-	and r2, r3
-	beq mc_fifo_full
-	str r0, [r1, #0x54] // SIO_FIFO_WR
-	sev
-	bx lr
-
-mc_fifo_recv:
-	ldr r1, sio_base
-	ldr r2, [r1, #0x50] // SIO_FIFO_ST
-	mov r3, #1
-	and r2, r3
-	bne mc_fifo_redy
-	wfe
-mc_fifo_redy:
-	ldr r0, [r1, #0x58] // SIO_FIFO_RD
-	bx lr
-
diff --git a/head/memmap.ld b/head/memmap.ld
@@ -1,20 +0,0 @@
-MEMORY
-{
-	FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2048k
-	SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 264k
-}
-
-SECTIONS
-{
-	.boot2 : {
-		*(.boot2)
-		. = 0x100;
-	} > FLASH
-
-	.text : AT(ORIGIN(FLASH) + 0x100){
-		*(.vectors)
-		*(.text)
-		_etext = .;
-	} > SRAM
-}
-