setos

commit 9b28be17eeb3633c95610a0e19ab49a0fe4b7ca8
parent c3a52cac8ea2b8ad646eea78ba059b54bd2f7c34
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Mon,  6 May 2024 10:03:16 +0900

start xHC

Diffstat:
M
sys/include/pci.h
 | 
2
+-
M
sys/src/kernel/main.c
 | 
27
+++++++++++++++++++++------

2 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/sys/include/pci.h b/sys/include/pci.h
@@ -70,7 +70,7 @@ typedef struct MSICap {
 	uint8  next_pointer;
 	uint16 message_control;
 	uint32 message_address;
-	uint32 meesage_upper_address; // TODO: assume 64-bit machine.
+	uint32 message_upper_address; // TODO: assume 64-bit machine.
 	uint16 message_data;
 } MSICap;
 
diff --git a/sys/src/kernel/main.c b/sys/src/kernel/main.c
@@ -79,7 +79,7 @@ kernel_main(EFI_GRAPHICS_OUTPUT_PROTOCOL *gop)
 
 	// reset xhc.
 	if ((xhc.op->USBSTS & 0x1) != 1) { // USBSTS.HCH
-		xhc.op->USBCMD &= ~0x1; // stop xhc.
+		xhc.op->USBCMD &= ~0x1; // USBCMD.R/S. stop xhc.
 		for (;(xhc.op->USBSTS & 0x1) != 1;) {
 		}
 	}
@@ -130,6 +130,7 @@ kernel_main(EFI_GRAPHICS_OUTPUT_PROTOCOL *gop)
 	xhc.op->USBCMD |= 1 << 2; // USBCMD.INTE
 
 	// setup interrupt
+	uint32 msg __attribute__((aligned(4))) = 0;
 	cons_printf(&con0, "local apic id: %x\n", *(uint32 *) (0xfee00020) >> 24);
 	uintptr pci_config_base = (uintptr) pci_xhc;
 	PCICap *cap = (PCICap *) (pci_config_base + pci_xhc->capabilities_pointer);
@@ -137,11 +138,17 @@ kernel_main(EFI_GRAPHICS_OUTPUT_PROTOCOL *gop)
 		switch (cap->capability_id) {
 		case 0x5:
 			cons_printf(&con0, "MSI\n");
+			MSICap *msi_cap = (MSICap *) cap;
+			msi_cap->message_control |= 0x1; // enable MSI
+			cons_printf(&con0, "message_control: %x\n", msi_cap->message_control);
+			msi_cap->message_address = (uint32) (uint64) &msg;
+			msi_cap->message_upper_address = (uint32) ((uint64) &msg >> 32);
+			msi_cap->message_data = 0xcafe;
 			break;
 		case 0x11:
 			cons_printf(&con0, "MSI-X\n");
 			/* pending development
-			MSIXCap *msix_cap = (MSIXCap *)cap;
+			MSIXCap *msix_cap = (MSIXCap *) cap;
 			// enable msi-x
 			msix_cap->message_control |= 1 << 15;
 			cons_printf(&con0, "message control: %x\n", msix_cap->message_control);
@@ -150,10 +157,10 @@ kernel_main(EFI_GRAPHICS_OUTPUT_PROTOCOL *gop)
 				(pci_xhc->t0.base_address_register[bir]&0xfffffff0);
 			MSIXTab msixtab = (MSIXTab)(bar + (msix_cap->table_offset&~0x3));
 			// setup message
-			uint32 msix_msg __attribute__((aligned(32)));
-			cons_printf(&con0, "&msix_msg: %x\n", &msix_msg);
-			msixtab[0].MsgAddr = (uint32) ((uint64)&msix_msg)&0xffffffff;
-			msixtab[0].MsgUpperAddr = (uint32) (((uint64)&msix_msg)>>32)&0xffffffff;
+			uint32 msg __attribute__((aligned(4)));
+			cons_printf(&con0, "&msg: %x\n", &msg);
+			msixtab[0].MsgAddr = (uint32) ((uint64)&msg)&0xffffffff;
+			msixtab[0].MsgUpperAddr = (uint32) (((uint64)&msg)>>32)&0xffffffff;
 			msixtab[0].MsgData = 0xdeadbeef;
 			msixtab[0].VectorControl &= ~0x1;
 			cons_printf(&con0, "capability_id: %x\n", msix_cap->capability_id);
@@ -174,6 +181,14 @@ kernel_main(EFI_GRAPHICS_OUTPUT_PROTOCOL *gop)
 			break;
 		}
 	}
+	// enable xHC.
+	xhc.op->USBCMD |= 0x1; // USBCMD.R/S
+	for (;(xhc.op->USBSTS & 0x1) != 0;) {
+	}
+	cons_printf(&con0, "xHC started\n");
+	for (;msg == 0;) {
+	}
+	cons_printf(&con0, "mouse moved\n");
 
 halt:
 	for(;;) { __asm__("hlt"); }