pci.h (2533B)
1 // #include <libc.h> 2 3 // TODO: need the attribute 'packed'? 4 typedef struct PCIDev { 5 uint16 vendor_id; 6 uint16 device_id; 7 uint16 command; 8 uint16 status; 9 uint8 revision_id; 10 uint8 prog; 11 uint8 sub_class; 12 uint8 base_class; 13 uint8 cache_line_size; 14 uint8 master_latenct_timer; 15 uint8 header_type; 16 uint8 bist; 17 union { 18 struct { 19 uint32 base_address_register[6]; 20 uint32 cardbus_cis_pointer; 21 uint16 subsystem_vendor_id; 22 uint16 subsystem_id; 23 uint32 expansion_rom_base_address; 24 } t0; 25 struct { 26 uint32 base_address_register[2]; 27 uint8 primary_bus_number; 28 uint8 secondary_bus_number; 29 uint8 subordinate_bus_number; 30 uint8 secondary_latency_timer; 31 uint8 io_base; 32 uint8 io_limit; 33 uint16 secondary_status; 34 uint16 memory_base; 35 uint16 memory_limit; 36 uint16 prefetchable_memory_base; 37 uint16 prefetchable_memory_limit; 38 uint32 prefetchable_base_upper_32_bits; 39 uint32 prefetchable_limit_upper_32_bits; 40 uint16 io_base_upper_16_bits; 41 uint16 io_limit_upper_16_bits; 42 } t1; 43 }; 44 uint8 capabilities_pointer; 45 uint8 reserved0[3]; 46 union { 47 uint32 reserved1; 48 uint32 expansion_rom_base_address; 49 }; 50 uint8 interrupt_line; 51 uint8 interrupt_pin; 52 union { 53 struct { 54 uint8 min_gnt; 55 uint8 max_lat; 56 }; 57 uint16 bridge_control; 58 }; 59 uint8 reg[192]; 60 } PCIDev; 61 #define MaxPCIDev 128 62 63 typedef struct PCICap { 64 uint8 capability_id; 65 uint8 next_pointer; 66 } PCICap; 67 68 typedef struct MSICap { 69 uint8 capability_id; 70 uint8 next_pointer; 71 uint16 message_control; 72 uint32 message_address; 73 uint32 message_upper_address; // TODO: assume 64-bit machine. 74 uint16 message_data; 75 } MSICap; 76 77 typedef struct MSIXCap { 78 uint8 capability_id; 79 uint8 next_pointer; 80 uint16 message_control; 81 uint32 table_offset; 82 uint32 pba_offset; 83 } MSIXCap; 84 85 typedef struct MSIXTabEntry { 86 uint32 MsgAddr; 87 uint32 MsgUpperAddr; 88 uint32 MsgData; 89 uint32 VectorControl; 90 } *MSIXTab; 91 92 typedef uint64 MSIXPBA[]; 93 94 extern PCIDev pci_dev[MaxPCIDev]; 95 extern int num_pci_dev; 96 97 // Pci_config_read16 reads pci header. 98 // The least significant bit of offset is ignored. 99 // The endianness is adjusted to the machine's endianness from pci's little-endian. 100 uint16 pci_config_read16(uint8 bus, uint8 dev, uint8 func, uint8 offset); 101 uint32 pci_config_read32(uint8 bus, uint8 dev, uint8 func, uint8 offset); 102 uint16 pci_config_read_vendor_id(uint8 bus, uint8 dev, uint8 func); 103 int pci_scan_all_bus(void); 104 int pci_scan_bus(uint8 bus); 105 int pci_scan_dev(uint8 bus, uint8 dev); 106 int pci_scan_func(uint8 bus, uint8 dev, uint8 func);