commit eff07034c7559d6e7008df62f86bef8c677a11f2
parent fa41209db53d0ade358e45436a9e3234e3231d0d
Author: Matsuda Kenji <info@mtkn.jp>
Date: Wed, 5 Apr 2023 10:45:58 +0900
add comment
Diffstat:
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/boot2/boot2.S b/boot2/boot2.S
@@ -15,34 +15,31 @@ boot2:
ldr r0, =XIP_SSI_BASE
+ // set SSI standard SPI
// disable ssi
mov r1, #0
str r1, [r0, #0x8] // SSI: SSIENR
-
//set divider
ldr r1, =0x2 // This is 2 in sdk
str r1, [r0, #0x14] // SSI: BAUDR
-
// set 1-cycle sample delay.
mov r1, #1
mov r2, #0xf0
str r1, [r0, r2] // SSI: RX_SAMPLE_DLY
-
// setup sregs
ldr r1, =((7 << 16) | (0 << 8)) // 8bit data frame size, tx and rx
str r1, [r0, #0] // SSI: CTRLR0
-
// enable ssi
mov r1, #1
str r1, [r0, #0x8] // SSI: SSIENR
+ // set flash QSPI
// write enable
mov r1, #0x06 // write enable
str r1, [r0, #0x60] // SSI: DR0
bl wait_ssi
ldr r0, =XIP_SSI_BASE
ldr r1, [r0, #0x60] // SSI: DR0
-
// set sreg
mov r1, #0x31 // write status register-2
str r1, [r0, #0x60] // SSI: DR0
@@ -54,39 +51,37 @@ boot2:
wait_sreg:
mov r1, #0x5 // read status register-1
- // maybe the first str represents the command and
- // does the second one the address.
+ // maybe the first str represents the command
+ // while does the second one the address.
str r1, [r0, #0x60] // SSI: DR0
str r1, [r0, #0x60] // SSI: DR0
bl wait_ssi
ldr r0, =XIP_SSI_BASE
ldr r1, [r0, #0x60] // SSI: DR0
ldr r1, [r0, #0x60] // SSI: DR0
-
mov r2, #1 // BUSY flag
tst r1, r2
bne wait_sreg
- // disable ssi again
+ // set SSI QSPI and XIP
+ // disable ssi
mov r1, #0
str r1, [r0, #0x8] // SSI: SSIENR
-
// set up quad spi
ldr r1, =((2 << 21) | (31 << 16)| (0 << 8)) // tmod is 3 in sdk
str r1, [r0, #0] // SSI: CTRLR0
-
mov r1, #0 // NDF = 0
str r1, [r0, #0x4] // SSI: CTRLR1
-
// setup xip
ldr r1, =((4 << 11) | (2 << 8) | (8 << 2) | (1 << 0))
mov r2, #0xf4
str r1, [r0, r2] // SSI: SPI_CTRLR0
-
// re-enable spi
mov r1, #1
str r1, [r0, #0x8] // SSI: SSIENR
+ // first read from flash
+ // set flash continuous read
mov r1, #0xeb // fast read quad i/o
str r1, [r0, #0x60] // SSI: DR0
// continuous read is not documented in w25q16j datasheet...
@@ -99,19 +94,19 @@ wait_sreg:
// I think I need to read rxd-fifo
// ldr r1, [r0, #0x60]
+ // set SIP continuous read
// disable spi
mov r1, #0
str r1, [r0, #0x8] // SSI: SSIENR
-
// the command bit is not documented.
ldr r1, =((0x20 << 24) | (4 << 11) | (0 << 8) | (8 << 2) | (2 << 0))
mov r2, #0xf4
str r1, [r0, r2] // SSI: SPI_CTRLR0
-
// re-enable ssi
mov r1, #1
str r1, [r0, #0x8] // SSI: SSIENR
+ // exit from boot2
pop {r0}
cmp r0, #0
beq vector_into_flash
