commit 9cdcea9b9982dc7affe5b89d02fb6b158581b7f5
parent 7bb36226a923999794652ad9cb96e7e0606cc76c
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Sat,  2 Mar 2024 07:13:02 +0900
use c file. no problem
Diffstat:
4 files changed, 79 insertions(+), 64 deletions(-)
diff --git a/ex1_sram/Makefile b/ex1_sram/Makefile
@@ -1,3 +1,4 @@
+CC = arm-none-eabi-gcc
 AS = arm-none-eabi-as
 LD = arm-none-eabi-ld
 OBJCOPY = arm-none-eabi-objcopy
@@ -18,8 +19,11 @@ clean:
 .s.o:
 	$(AS) $(ASFLAGS) -o $@ $<
 
-led.elf: boot2.o main.o memmap.ld
-	$(LD) $(LDFLAGS) -o $@ -T memmap.ld boot2.o main.o 
+.c.o:
+	$(CC) $(CFLAGS) -o $@ $<
+
+led.elf: boot2.o main.o start.o memmap.ld
+	$(LD) $(LDFLAGS) -o $@ -T memmap.ld boot2.o main.o start.o
 
 led.bin: led.elf
 	$(OBJCOPY) -O binary led.elf $@
diff --git a/ex1_sram/main.c b/ex1_sram/main.c
@@ -0,0 +1,7 @@
+void led(void);
+
+void
+main(void)
+{
+	led();
+}
diff --git a/ex1_sram/main.s b/ex1_sram/main.s
@@ -1,62 +0,0 @@
-.cpu cortex-m0plus
-.thumb
-
-	.section .vectors
-	.global vectors
-vectors:
-	.word 0x20040000 // initial SP
-	.word (reset+1)  // entry point
-
-	.section .text
-reset:
-	// unreset gpio
-	mov r0, #1
-	lsl r0, r0, #5 // io_bank0
-	ldr r3, resets_base
-	ldr r1, atomic_clr
-	str r0, [r3, r1] // RESETS: RESET
-
-reset_chk:
-	ldr r1, [r3, #0x8] // RESETS: RESET_DONE
-	tst r0, r1
-	beq reset_chk
-
-	// set gpio functions
-	ldr r3, io_bank0_base
-	mov r0, #5 // sio
-	mov r1, #0xcc
-	str r0, [r3, r1] // IO_BANK0: GPIO25_CTRL
-
-	// enable gpio output
-	ldr r3, sio_base
-	mov r0, #1
-	lsl r0, r0, #25 // gpio25
-	str r0, [r3, #0x24] // SIO: GPIO_OE
-
-	// blink led on gpio25
-	ldr r4, sio_base
-	mov r5, r0
-loop:
-	str r5, [r4, #0x1c] // SIO_GPIO_OUT_XOR
-	bl delay
-	b loop
-
-delay:
-	mov r0, #1
-	lsl r0, r0, #20
-delay_loop:
-	sub r0, r0, #1
-	bne delay_loop
-	bx lr
-
-// literals
-	.align 2
-atomic_clr:
-	.word 0x00003000
-resets_base:
-	.word 0x4000c000
-io_bank0_base:
-	.word 0x40014000
-sio_base:
-	.word 0xd0000000
-
diff --git a/ex1_sram/start.s b/ex1_sram/start.s
@@ -0,0 +1,66 @@
+.cpu cortex-m0plus
+.thumb
+
+	.section .vectors
+	.global vectors
+vectors:
+	.word 0x20040000 // initial SP
+	.word (reset+1)  // entry point
+
+	.section .text
+reset:
+	bl main
+
+	.global led
+led:
+	// unreset gpio
+	mov r0, #1
+	lsl r0, r0, #5 // io_bank0
+	ldr r3, resets_base
+	ldr r1, atomic_clr
+	str r0, [r3, r1] // RESETS: RESET
+
+reset_chk:
+	ldr r1, [r3, #0x8] // RESETS: RESET_DONE
+	tst r0, r1
+	beq reset_chk
+
+	// set gpio functions
+	ldr r3, io_bank0_base
+	mov r0, #5 // sio
+	mov r1, #0xcc
+	str r0, [r3, r1] // IO_BANK0: GPIO25_CTRL
+
+	// enable gpio output
+	ldr r3, sio_base
+	mov r0, #1
+	lsl r0, r0, #25 // gpio25
+	str r0, [r3, #0x24] // SIO: GPIO_OE
+
+	// blink led on gpio25
+	ldr r4, sio_base
+	mov r5, r0
+loop:
+	str r5, [r4, #0x1c] // SIO_GPIO_OUT_XOR
+	bl delay
+	b loop
+
+delay:
+	mov r0, #1
+	lsl r0, r0, #20
+delay_loop:
+	sub r0, r0, #1
+	bne delay_loop
+	bx lr
+
+// literals
+	.align 2
+atomic_clr:
+	.word 0x00003000
+resets_base:
+	.word 0x4000c000
+io_bank0_base:
+	.word 0x40014000
+sio_base:
+	.word 0xd0000000
+