rp2040

RP2040 Programming without SDK
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commit 7bb36226a923999794652ad9cb96e7e0606cc76c
parent 6a76c5f0738626054d7b9f5e1b2fb41e0c253bea
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Sat,  2 Mar 2024 07:03:16 +0900

copy led blink to sram

Diffstat:
Aex1_sram/Makefile | 36++++++++++++++++++++++++++++++++++++
Aex1_sram/boot2.s | 46++++++++++++++++++++++++++++++++++++++++++++++
Aex1_sram/main.s | 62++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Aex1_sram/memmap.ld | 26++++++++++++++++++++++++++
4 files changed, 170 insertions(+), 0 deletions(-)

diff --git a/ex1_sram/Makefile b/ex1_sram/Makefile @@ -0,0 +1,36 @@ +AS = arm-none-eabi-as +LD = arm-none-eabi-ld +OBJCOPY = arm-none-eabi-objcopy +BINCRC = ../tools/bincrc +BIN2UF2 = ../tools/bin2uf2 + +MCPU = -mcpu=cortex-m0plus +ASFLAGS = $(MCPU) +CFLAGS = $(MCPU) -ffreestanding -nostartfiles -O0 -fpic -mthumb -c +LDFLAGS = --no-relax -nostdlib + +all: tools led.uf2 + +clean: + rm -f *.o *.elf *.uf2 *.bin + cd ../tools && make clean + +.s.o: + $(AS) $(ASFLAGS) -o $@ $< + +led.elf: boot2.o main.o memmap.ld + $(LD) $(LDFLAGS) -o $@ -T memmap.ld boot2.o main.o + +led.bin: led.elf + $(OBJCOPY) -O binary led.elf $@ + +led.uf2: led.bin + $(BINCRC) led.bin led_crc.bin + $(BIN2UF2) led_crc.bin $@ + +flash: all + mount /dev/disk/by-label/RPI-RP2 /mnt + cp led.uf2 /mnt + +tools: + cd ../tools && make diff --git a/ex1_sram/boot2.s b/ex1_sram/boot2.s @@ -0,0 +1,46 @@ +.cpu cortex-m0plus +.thumb + + .section .boot2 +boot2: + // setup xip + ldr r3, rom_base + ldrh r0, [r3, #0x14] // rom_func_table + ldr r1, =('C' | 'X' << 8) // _flash_enter_cmd_xip() + ldrh r2, [r3, #0x18] // rom_table_lookup + blx r2 + blx r0 + + // load main program to sram + ldr r0, =text_start + ldr r1, =text_size + mov r2, #0 + ldr r3, sram_base +copy: + cmp r1, r2 + beq end + ldr r4, [r0, r2] + str r4, [r3, r2] + add r2, #4 + b copy +end: + + // setup vector table + ldr r0, =vectors + ldr r1, m0plus_vtor + str r0, [r1, #0] // M0PLUS: VTOR + ldr r1, [r0, #4] // entry point + ldr r0, [r0, #0] // stack pointer + mov sp, r0 + bx r1 + + .align 2 +rom_base: + .word 0x00000000 +sram_base: + .word 0x20000000 +m0plus_vtor: + .word 0xe0000000 + 0xed08 +literals: + .ltorg + diff --git a/ex1_sram/main.s b/ex1_sram/main.s @@ -0,0 +1,62 @@ +.cpu cortex-m0plus +.thumb + + .section .vectors + .global vectors +vectors: + .word 0x20040000 // initial SP + .word (reset+1) // entry point + + .section .text +reset: + // unreset gpio + mov r0, #1 + lsl r0, r0, #5 // io_bank0 + ldr r3, resets_base + ldr r1, atomic_clr + str r0, [r3, r1] // RESETS: RESET + +reset_chk: + ldr r1, [r3, #0x8] // RESETS: RESET_DONE + tst r0, r1 + beq reset_chk + + // set gpio functions + ldr r3, io_bank0_base + mov r0, #5 // sio + mov r1, #0xcc + str r0, [r3, r1] // IO_BANK0: GPIO25_CTRL + + // enable gpio output + ldr r3, sio_base + mov r0, #1 + lsl r0, r0, #25 // gpio25 + str r0, [r3, #0x24] // SIO: GPIO_OE + + // blink led on gpio25 + ldr r4, sio_base + mov r5, r0 +loop: + str r5, [r4, #0x1c] // SIO_GPIO_OUT_XOR + bl delay + b loop + +delay: + mov r0, #1 + lsl r0, r0, #20 +delay_loop: + sub r0, r0, #1 + bne delay_loop + bx lr + +// literals + .align 2 +atomic_clr: + .word 0x00003000 +resets_base: + .word 0x4000c000 +io_bank0_base: + .word 0x40014000 +sio_base: + .word 0xd0000000 + diff --git a/ex1_sram/memmap.ld b/ex1_sram/memmap.ld @@ -0,0 +1,26 @@ +MEMORY +{ + FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2048k + SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 264k +} + +SECTIONS +{ + .boot2 : { + *(.boot2) + . = 0x100; + } > FLASH + + .vectors : { + *(.vectors) + . += SIZEOF(.vectors); + . = ALIGN(2); + text_start = .; + } > FLASH + + .text : { + *(.text) + } > SRAM AT > FLASH + text_size = SIZEOF(.text); +} +