rp2040

RP2040 Programming without SDK
Log | Files | Refs

commit 181ef24e87dc72c878c65494a07c284daf688276
parent 6937c573588a9180fe75267f5fb64a676585ab46
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Wed, 28 Feb 2024 07:38:24 +0900

count clock cycles
they are not affected by RUN button

Diffstat:
Mex3/main.s | 22+++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/ex3/main.s b/ex3/main.s @@ -127,19 +127,27 @@ wait_vco: // set timer ldr r0, =0x20000 // bl set_alarm -/* + // debug: count frequency ldr r3, clocks_base + add r3, r3, #0x80 wait_fc0: - ldr r0, [r3, #0x98] // CLOCKS: FC0_STATUS + ldr r0, [r3, #0x18] // CLOCKS: FC0_STATUS ldr r1, =(1 << 8) // RUNNING tst r0, r1 - beq wait_fc0 + bne wait_fc0 ldr r0, =(12 * 1000) // 12MHz - str r0, [r3, #0x80] // CLOCKS: FC0_REF_KHZ - mov r0, #0x09 // clk_sys - str r0, [r3, #0x94] -*/ + str r0, [r3, #0] // CLOCKS: FC0_REF_KHZ + mov r0, #0x0a // clk_peri + str r0, [r3, #0x14] // CLOCKS: FC0_SRC +wait_fc1: + ldr r0, [r3, #0x18] // CLOCKS: FC0_STATUS + ldr r1, =(1 << 4) // DONE + tst r0, r1 + beq wait_fc1 + ldr r0, [r3, #0x1c] // CLOCKS: FC0_RESULT + bl printh + loop: ldr r0, =0xdeadcafe bl printh