rp2040

commit 6937c573588a9180fe75267f5fb64a676585ab46
parent b5392ca728e1e2abe47cdf5a141578ef0becec4e
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Tue, 27 Feb 2024 12:43:50 +0900

fix unreset_chk and try to count freq

Diffstat:
M
ex3/main.s
 | 
29
+++++++++++++++++++++--------

1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/ex3/main.s b/ex3/main.s
@@ -28,10 +28,13 @@ reset:
 	ldr r3, resets_base
 	ldr r1, atomic_clr
 	str r0, [r3, r1] // RESETS: RESET
+	mov r1, #1
+	lsl r1, #22
+	bic r0, r1 // uart stays in reset state until clock_peri is enabled
 unreset_chk:
 	ldr r1, [r3, #0x8] // RESETS: RESET_DONE
-	tst r0, r1
-	beq unreset_chk
+	bic r0, r1
+	bne unreset_chk
 
 	// set gpio functions
 	ldr r3, io_bank0_base
@@ -83,6 +86,9 @@ wait_vco:
 	mov r0, #1
 	lsl r0, r0, #11
 	str r0, [r3, #0x48] // CLOCKS: CLK_PERI_CTRL
+	// setup clk_ref
+	mov r0, #0x2
+	str r0, [r3, #0x30] // CLOCKS: CLK_REF_CTRL
 
 	// disable rosc
 	ldr r3, rosc_base
@@ -121,12 +127,19 @@ wait_vco:
 	// set timer
 	ldr r0, =0x20000 // 
 	bl set_alarm
-
-	// debug
-	ldr r3, rosc_base
-	ldr r0, [r3, #0] // ROSC: CTRL
-	bl printh
-
+/*
+	// debug: count frequency
+	ldr r3, clocks_base
+wait_fc0:
+	ldr r0, [r3, #0x98] // CLOCKS: FC0_STATUS
+	ldr r1, =(1 << 8) // RUNNING
+	tst r0, r1
+	beq wait_fc0
+	ldr r0, =(12 * 1000) // 12MHz
+	str r0, [r3, #0x80] // CLOCKS: FC0_REF_KHZ
+	mov r0, #0x09 // clk_sys
+	str r0, [r3, #0x94]
+*/
 loop:
 	ldr r0, =0xdeadcafe
 	bl printh