rp2040

RP2040 Programming without SDK
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commit ebda2e2c7c3a8e48020c15d06b46a4e7528b1eff
parent 88a4d0b9ff7e004c7e4cf45b60c5f051bed29eab
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Fri, 23 Feb 2024 13:31:46 +0900

worked, although timer is slow after reset

Diffstat:
Mex3/boot2.s | 4+---
Mex3/main.s | 27++++++++++++++++++++-------
Mex3/memmap.ld | 2+-
3 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/ex3/boot2.s b/ex3/boot2.s @@ -11,7 +11,7 @@ setup_xip: blx r2 blx r0 - ldr r0, flash_main + ldr r0, =vectors ldr r1, m0plus_vtor str r0, [r1, #0] // M0PLUS: VTOR ldr r1, [r0, #4] // entry point @@ -22,8 +22,6 @@ setup_xip: .align 2 rom_base: .word 0x00000000 -flash_main: - .word 0x10000000 + 0x100 m0plus_vtor: .word 0xe0000000 + 0xed08 literals: diff --git a/ex3/main.s b/ex3/main.s @@ -2,6 +2,7 @@ .thumb .section .vectors + .global vectors vectors: .word 0x20040000 // initial SP .word (reset+1) // entry point @@ -59,17 +60,19 @@ wait_vco: mov r0, #8 // POSTDIVPD str r0, [r3, r1] // PLL: PWR - // set system clock clksrc_pll_sys ldr r3, clocks_base + // set clk_ref to xosc + mov r0, #2 + ldr r1, atomic_set + add r1, r1, #0x30 + str r0, [r3, r1] // CLOCKS: CLK_REF_CTRL + // set system clock clksrc_pll_sys ldr r0, =(0x0 << 5 | 0x1) str r0, [r3, #0x3c] // CLOCKS: CLK_SYS_CTRL // enable clk_peri mov r0, #1 lsl r0, r0, #11 str r0, [r3, #0x48] // CLOCKS: CLK_PERI_CTRL - // set clk_ref to xosc - mov r0, #2 - str r0, [r3, #0x30] // CLOCKS: CLK_REF_CTRL // setup uart0 ldr r3, uart0_base @@ -101,14 +104,24 @@ wait_vco: sub r1, r1, #4 mov r0, #1 str r0, [r3, r1] // M0PLUS: SYST_CSR +/* +debug: + ldr r0, ='\r' + bl putbyte + ldr r4, =0x20000000 + ldr r0, [r4, #0] + bl printh + ldr r0, ='\n' + bl putbyte +*/ - mov r4, r3 + ldr r4, ppb_base ldr r5, =0xe018 loop: - ldr r0, [r4, r5] // M0PLUS: SYST_CVR - bl printh ldr r0, ='\r' bl putbyte + ldr r0, [r4, r5] // M0PLUS: SYST_CVR + bl printh b loop // functions diff --git a/ex3/memmap.ld b/ex3/memmap.ld @@ -1,6 +1,6 @@ MEMORY { - FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2048k + FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2m SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 264k }