rp2040

commit aacd50a70d96c4a4cd5c1fabc41a8d76debf2c68
parent 6c641f4ea9d40c27a9e14629f85814ff0778a18a
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Fri, 23 Feb 2024 15:48:00 +0900

merge

Diffstat:
M
ex3/boot2.s
 | 
11
+++++------
M
ex3/main.s
 | 
28
++++++++++++++++++----------
M
ex3/memmap.ld
 | 
7
++++++-

3 files changed, 29 insertions(+), 17 deletions(-)
diff --git a/ex3/boot2.s b/ex3/boot2.s
@@ -11,12 +11,11 @@ setup_xip:
 	blx r2
 	blx r0
 
-	//ldr r0, =0x10010000
-	//ldr r1, m0plus_vtor 
-	//str r0, [r1, #0] // M0PLUS: VTOR
-	//ldr r1, [r0, #4] // entry point
-	//ldr r0, [r0, #0] // stack pointer
-	ldr r0, =0x20040000
+	ldr r0, =vectors
+	ldr r1, m0plus_vtor 
+	str r0, [r1, #0] // M0PLUS: VTOR
+	ldr r1, [r0, #4] // entry point
+	ldr r0, [r0, #0] // stack pointer
 	mov sp, r0
 	b reset
 
diff --git a/ex3/main.s b/ex3/main.s
@@ -1,13 +1,11 @@
 .cpu cortex-m0plus
 .thumb
 
-/*
-	.section .vectors
+	.section .rodata
 	.global vectors
 vectors:
 	.word 0x20040000 // initial SP
 	.word (reset+1)  // entry point
-*/
 
 	.section .text
 	.global reset
@@ -63,17 +61,19 @@ wait_vco:
 	mov r0, #8 // POSTDIVPD
 	str r0, [r3, r1] // PLL: PWR
 
-	// set system clock clksrc_pll_sys
 	ldr r3, clocks_base
+	// set clk_ref to xosc
+	mov r0, #2
+	ldr r1, atomic_set
+	add r1, r1, #0x30
+	str r0, [r3, r1] // CLOCKS: CLK_REF_CTRL
+	// set system clock clksrc_pll_sys
 	ldr r0, =(0x0 << 5 | 0x1)
 	str r0, [r3, #0x3c] // CLOCKS: CLK_SYS_CTRL
 	// enable clk_peri
 	mov r0, #1
 	lsl r0, r0, #11
 	str r0, [r3, #0x48] // CLOCKS: CLK_PERI_CTRL
-	// set clk_ref to xosc
-	mov r0, #2
-	str r0, [r3, #0x30] // CLOCKS: CLK_REF_CTRL
 
 	// setup uart0
 	ldr r3, uart0_base
@@ -105,14 +105,22 @@ wait_vco:
 	sub r1, r1, #4
 	mov r0, #1
 	str r0, [r3, r1] // M0PLUS: SYST_CSR
+debug:
+	ldr r0, ='\r'
+	bl putbyte
+	ldr r4, =(0xe0000000 + 0xed08)
+	ldr r0, [r4, #0] // M0PLUS: VTOR
+	bl printh
+	ldr r0, ='\n'
+	bl putbyte
 
-	mov r4, r3
+	ldr r4, ppb_base
 	ldr r5, =0xe018
 loop:
-	ldr r0, [r4, r5] // M0PLUS: SYST_CVR
-	bl printh
 	ldr r0, ='\r'
 	bl putbyte
+	ldr r0, [r4, r5] // M0PLUS: SYST_CVR
+	bl printh
 	b loop
 
 // functions
diff --git a/ex3/memmap.ld b/ex3/memmap.ld
@@ -1,6 +1,7 @@
 MEMORY
 {
-	FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2048k
+	FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 1m
+	VTOR(rx)  : ORIGIN = 0x10100000, LENGTH = 1m
 	SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 264k
 }
 
@@ -14,5 +15,9 @@ SECTIONS
 	.text : {
 		*(.text)
 	} > FLASH
+
+	.rodata : {
+		*(.rodata)
+	} > VTOR
 }