rp2040

commit aa387d17a5e5f122413a252ddb7ba4a22956676f
parent 62c0baf87b41ca67319400b478ac5bb441f4232b
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Thu, 29 Feb 2024 10:07:37 +0900

use global variable, need to write to sram

Diffstat:
M
ex3/main.c
 | 
9
++++++++-
M
ex3/memmap.ld
 | 
8
++++++++
M
ex3/start.s
 | 
76
++++++++++++++++++++++++++++++++++++++++++++++------------------------------

3 files changed, 62 insertions(+), 31 deletions(-)
diff --git a/ex3/main.c b/ex3/main.c
@@ -1,8 +1,11 @@
+void init(void);
 int puts(char *);
+void printh(unsigned int);
 void set_alarm(unsigned int);
 
 int
 main(void) {
+	init();
 	puts("C file");
 	return 0;
 }
@@ -12,7 +15,11 @@ isr_svcall(void) {
 	puts("svcall");
 }
 
+int count = 0;
+
 void
 isr_alarm(void) {
-	set_alarm(0x20000);
+	printh(count++);
+	puts("alarm fired");
+	set_alarm(1000 * 1000);
 }
diff --git a/ex3/memmap.ld b/ex3/memmap.ld
@@ -14,5 +14,13 @@ SECTIONS
 	.text : {
 		*(.text)
 	} > FLASH
+
+	.data : {
+		*(.data)
+	} > SRAM
+
+	.bss : {
+		*(.bss)
+	} > SRAM
 }
 
diff --git a/ex3/start.s b/ex3/start.s
@@ -18,11 +18,23 @@ vectors:
 	.word reset+1  // 12
 	.word reset+1  // 13
 	.word reset+1  // 14
-	.word isr_systick+1  // 15 systick
+	.word reset+1  // 15 systick
 	.word isr_alarm+1  // 16 alarm_0
 
 	.section .text
 reset:
+	bl main
+loop:
+	wfi
+	b loop
+
+// functions
+
+	// void init(void);
+	// Init initializes the chip.
+	.global init
+init:
+	push {lr}
 	// unreset gpio, pll_sys, timer
 	ldr r0, =(1 << 21 | 1 << 12 | 1 << 5) // | timer | pll_sys | io_bank0
 	bl unreset
@@ -91,44 +103,19 @@ wait_vco:
 	str r0, [r3, #0] // ROSC: CTRL
 
 	// setup uart0
-	ldr r3, uart0_base
-	// set baudrate 115200
-	// BDRI = 72, BDRF = 0.157 (10 / 64)
-	mov r0, #72
-	str r0, [r3, #0x24] // UART: UARTIBRD
-	mov r0, #10
-	str r0, [r3, #0x28] // UART: UARTFBRD
-	// enable uart0
-	mov r0, #1 // UARTEN
-	ldr r1, atomic_set
-	add r1, r1, #0x30
-	str r0, [r3, r1] // UART: UARTCR
-	// enable FIFO and set format
-	ldr r0, =(3 << 5 | 1 << 4) // WLEN = 8, FEN = 1
-	str r0, [r3, #0x2c] // UART: UARTLCR_H
+	bl enable_uart
 
 	// enable interrupt
-	ldr r3, ppb_base
 	// enable timer_irq_0
-	ldr r1, =0xe100
-	mov r0, #1
-	str r0, [r3, r1] // M0PLUS: NVIC_ISER
+	mov r0, #1 // timer_irq_0
+	bl enable_irq
 
 	// set timer
 	bl init_timer
 	ldr r0, =0x20000
 	bl set_alarm
 
-	bl main
-
-loop:
-	ldr r0, =message
-	bl puts
-	wfi
-	svc #0
-	b loop
-
-// functions
+	pop {pc} // end of init.
 
 	// void unreset(unsigned int sub_systems);
 	// unreset deasserts reset bit of subsystems specified by sub_systems.
@@ -144,6 +131,34 @@ unreset_chk:
 	bne unreset_chk
 	bx lr
 
+	// void enable_uart(void);
+	// Enable_uart enables uart.
+enable_uart:
+	ldr r3, uart0_base
+	// set baudrate 115200
+	// BDRI = 72, BDRF = 0.157 (10 / 64)
+	mov r0, #72
+	str r0, [r3, #0x24] // UART: UARTIBRD
+	mov r0, #10
+	str r0, [r3, #0x28] // UART: UARTFBRD
+	// enable uart0
+	mov r0, #1 // UARTEN
+	ldr r1, atomic_set
+	add r1, r1, #0x30
+	str r0, [r3, r1] // UART: UARTCR
+	// enable FIFO and set format
+	ldr r0, =(3 << 5 | 1 << 4) // WLEN = 8, FEN = 1
+	str r0, [r3, #0x2c] // UART: UARTLCR_H
+	bx lr
+
+	// void enable_irq(unsigned int);
+	// Enable_irq enables irq specified by the argument.
+enable_irq:
+	ldr r3, ppb_base
+	ldr r1, =0xe100
+	str r0, [r3, r1] // M0PLUS: NVIC_ISER
+	bx lr
+
 	// void init_timer(void);
 	// Init_timer enables alarm_0 and its interrupt.
 	// It assumes that the timer is out of reset.
@@ -174,6 +189,7 @@ set_alarm:
 	bx lr
 
 	// print r0 in hex for debugging.
+	.global printh
 printh:
 	push {r4, r5, r6, r7, lr}
 	mov r4, r0