rp2040

RP2040 Programming without SDK
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commit 97f15faf35b28d147e72dbd4b9795015a5224014
parent 2e170d8e95021914ef8aebceaac77369be3bcf0c
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Mon, 20 Mar 2023 10:30:53 +0900

delete unnecessary instructions

Diffstat:
Mmain.s | 28++++------------------------
1 file changed, 4 insertions(+), 24 deletions(-)

diff --git a/main.s b/main.s @@ -23,24 +23,6 @@ main: lsl r1, r1, #22 // gpio22 and gpio24 str r1, [r0, #0x24] - // check which systems are out of reset - ldr r0, resets_base - ldr r4, [r0, #0] // RESETS_RESET - mov r6, #24 -check_reset_loop: - mov r5, #1 - and r5, r4, r5 - beq out_of_reset - bl p1 - b in_reset -out_of_reset: - bl p0 -in_reset: - lsr r4, r4, #1 - sub r6, r6, #1 - bne check_reset_loop - - // enable xosc ldr r0, xosc_base mov r1, #0xf @@ -52,27 +34,25 @@ in_reset: str r1, [r0, #0] // XOSC_CTRL // set xosc delay - ldr r0, xosc_base mov r1, #47 str r1, [r0, #0xc] // XOSC_STARTUP // wait for xosc startup xosc_stable: - ldr r0, xosc_base ldr r1, [r0, #0x4] // XOSC_STATUS lsr r1, r1, #31 beq xosc_stable - // set feedback divider + // set lpp feedback divider ldr r0, pll_sys_base mov r1, #0x14 - lsl r1, r1, #4 - str r1, [r0, #0x8] + lsl r1, r1, #4 // #320 + str r1, [r0, #0x8] // PLL_FBDIV_INT // power on pll ldr r1, atomic_clr add r0, r0, r1 - mov r1, #33 + mov r1, #33 // VCOPD | PD str r1, [r0, #0x4] // PLL_PWR // wait for pll locking