rp2040

RP2040 Programming without SDK
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commit 6c1fbebf8121ec7d089342e3526c907b63b042e6
parent 566e5a00c4a65b8c4249cd04751c589332a34d29
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Tue, 11 Apr 2023 11:09:33 +0900

try to execute command on flash

Diffstat:
Dboot2/boot2.bin | 0
Dboot2/boot2.o | 0
Dboot2/boot2_crc.s | 21---------------------
Mmach.s | 71++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------
4 files changed, 56 insertions(+), 36 deletions(-)

diff --git a/boot2/boot2.bin b/boot2/boot2.bin Binary files differ. diff --git a/boot2/boot2.o b/boot2/boot2.o Binary files differ. diff --git a/boot2/boot2_crc.s b/boot2/boot2_crc.s @@ -1,21 +0,0 @@ -.cpu cortex-m0plus -.thumb - -.section .boot2, "ax" - -.byte 0x10, 0xb5, 0x33, 0x4c, 0x34, 0x49, 0x61, 0x60, 0x2f, 0x4c, 0x00, 0x21, 0xa1, 0x60, 0x02, 0x21 -.byte 0x61, 0x61, 0x01, 0x21, 0xf0, 0x22, 0xa1, 0x50, 0x30, 0x49, 0x21, 0x60, 0x01, 0x21, 0xa1, 0x60 -.byte 0x06, 0x21, 0x21, 0x66, 0x00, 0xf0, 0x46, 0xf8, 0x21, 0x6e, 0x31, 0x21, 0x21, 0x66, 0x02, 0x21 -.byte 0x21, 0x66, 0x00, 0xf0, 0x3f, 0xf8, 0x21, 0x6e, 0x21, 0x6e, 0x05, 0x21, 0x21, 0x66, 0x21, 0x66 -.byte 0x00, 0xf0, 0x38, 0xf8, 0x21, 0x6e, 0x21, 0x6e, 0x01, 0x22, 0x11, 0x42, 0xf5, 0xd1, 0x00, 0x21 -.byte 0xa1, 0x60, 0x23, 0x49, 0x21, 0x60, 0x00, 0x21, 0x61, 0x60, 0x22, 0x49, 0xf4, 0x22, 0xa1, 0x50 -.byte 0x01, 0x21, 0xa1, 0x60, 0xeb, 0x21, 0x21, 0x66, 0x20, 0x21, 0x21, 0x66, 0x00, 0xf0, 0x22, 0xf8 -.byte 0x00, 0x21, 0xa1, 0x60, 0x1c, 0x49, 0xf4, 0x22, 0xa1, 0x50, 0x01, 0x21, 0xa1, 0x60, 0x11, 0x4a -.byte 0x12, 0x4b, 0x1a, 0x48, 0x11, 0x68, 0x19, 0x60, 0x04, 0x32, 0x04, 0x33, 0x04, 0x38, 0xf9, 0xd1 -.byte 0x10, 0xbc, 0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, 0x00, 0x47, 0x0c, 0x48, 0x0d, 0x49, 0x08, 0x60 -.byte 0x41, 0x68, 0x00, 0x68, 0x85, 0x46, 0x08, 0x47, 0x06, 0xb5, 0xa1, 0x6a, 0x08, 0x22, 0x11, 0x42 -.byte 0xfa, 0xd1, 0x06, 0xbd, 0xa1, 0x6a, 0x04, 0x22, 0x11, 0x42, 0xfb, 0xd0, 0x01, 0x22, 0x11, 0x42 -.byte 0xf8, 0xd1, 0x70, 0x47, 0x00, 0x01, 0x00, 0x10, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x20 -.byte 0x00, 0x00, 0x02, 0x40, 0x08, 0xed, 0x00, 0xe0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00 -.byte 0x00, 0x00, 0x5f, 0x00, 0x21, 0x22, 0x00, 0x00, 0x22, 0x20, 0x00, 0x20, 0x00, 0x01, 0x00, 0x00 -.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xed, 0x9e, 0x56, 0xf8 diff --git a/mach.s b/mach.s @@ -7,7 +7,6 @@ vectors: .word (reset+1) // entry point .section .sram_cpy - .global reset .thumb_func reset: ldr r0, init_sp @@ -165,6 +164,62 @@ pll_lock: lsl r1, r1, #5 str r1, [r0, #0x2c] // UART0_UARTLCR_H +flash_read: + ldr r3, xip_ssi_base + // disable ssi + mov r1, #0 + str r1, [r3, #0x8] // SSI: SSIENR + ldr r1, =((2 << 21) | (7 << 16) | (3 << 8)) + str r1, [r3, #0] // SSI: CTRLR0 + mov r1, #0 + str r1, [r3, #4] // SSI: CTRLR1 + // setup SPI + ldr r1, =((0x0 << 24) | (0 << 11) | (0 << 8) | (0 << 2) | 0) + //ldr r1, =(0x03 << 24) + mov r2, #0xf4 + str r1, [r3, r2] // SSI: SPI_CTRLR0 + // reenable SSI + mov r1, #1 + str r1, [r3, #0x8] // SSI: SSIENR + + mov r1, #0x06 + //ldr r2, =0x00000100 + str r1, [r3, #0x60] // SSI: DR0 + str r1, [r3, #0x60] // SSI: DR0 + bl wait_ssi + bl ssi_pop + + mov r1, #0x35 + str r1, [r3, #0x60] // SSI: DR0 + str r1, [r3, #0x60] // SSI: DR0 + bl wait_ssi + bl ssi_pop + + pop {pc} + +wait_ssi: + ldr r1, [r3, #0x28] // SSI: SR + mov r2, #4 // TFE + tst r1, r2 + beq wait_ssi + mov r2, #1 // BUSY + tst r1, r2 + bne wait_ssi + bx lr + +ssi_pop: + push {lr} +ssi_pop_loop: + ldr r1, [r3, #0x28] // SSI: SR + mov r2, #8 // RFNE + tst r1, r2 + beq ssi_empty + ldr r0, [r3, #0x60] // SSI: DR0 + bl printh + mov r0, #'\n' + bl putchar + b ssi_pop_loop +ssi_empty: pop {pc} unreset: @@ -328,46 +383,32 @@ del_loop: // data .align 2 - atomic_set: .word 0x00002000 - atomic_clr: .word 0x00003000 - xip_base: .word 0x10000000 - xip_ssi_base: .word 0x18000000 - sram_base: .word 0x20000000 - clocks_base: .word 0x40008000 - resets_base: .word 0x4000c000 - reset_done: .word 0x4000c008 - io_bank0_base: .word 0x40014000 - xosc_base: .word 0x40024000 - pll_sys_base: .word 0x40028000 - uart0_base: .word 0x40034000 - rosc_base: .word 0x40060000 - sio_base: .word 0xd0000000