rp2040

commit 56f85fac0d8cd2d0effedd6f784264d1b3aa7f6e
parent 137662ba28b9bb57d4316f1ffeaa3639fd68d606
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Wed, 27 Aug 2025 08:12:55 +0900

enable uart fifo

Diffstat:
M
ex3_interrupt/main.s
 | 
6
+++---

1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/ex3_interrupt/main.s b/ex3_interrupt/main.s
@@ -142,8 +142,8 @@ wait_vco:
 	ldr r1, atomic_set
 	add r1, r1, #0x30
 	str r0, [r3, r1] // UART: UARTCR
-	// disable FIFO and set format
-	ldr r0, =(3 << 5 | 0 << 4) // WLEN = 8, FEN = 0
+	// enable FIFO and set format
+	ldr r0, =(3 << 5 | 1 << 4) // WLEN = 8, FEN = 1
 	str r0, [r3, #0x2c] // UART: UARTLCR_H
 
 	// enable uart interrupt in cpu
@@ -156,7 +156,7 @@ wait_vco:
 
 	// enable uart interrupt in uart0 subsystem
 	ldr r1, uart0_base
-	mov r2, #(1<<4) // RXIM
+	mov r2, #(1 << 6 | 1 << 4) // RTIM | RXIM
 	str r2, [r1, #0x38] // UART: UARTIMSC
 	// set fifo level to 0
 	mov r2, #0