rp2040

commit 2b551fc12eeed84218c604b1dee0d44c1dae57c2
parent 00047d21cef637a2ada062b3399d49b97ef6316f
Author: Matsuda Kenji <info@mtkn.jp>
Date:   Mon, 11 Aug 2025 13:47:35 +0900

set up uart0 interrupt, wip

Diffstat:
M
spi/main.s
 | 
18
++++++++++++++++--

1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/spi/main.s b/spi/main.s
@@ -112,7 +112,7 @@ wait_vco:
 	ldr r0, =(3 << 5 | 1 << 4) // WLEN = 8, FEN = 1
 	str r0, [r3, #0x2c] // UART: UARTLCR_H
 
-	// enable uart interrupt
+	// enable uart interrupt in cpu
 	ldr r4, ppb_base
 	mov r5, #0xe1
 	lsl r5, #8
@@ -120,7 +120,21 @@ wait_vco:
 	lsl r0, #20
 	str r0, [r4, r5] // M0PLUS: NVIC_ISER
 
+	// enable uart interrupt in uart0 subsystem
+	ldr r1, uart0_base
+	// according to sdk's src/rp2_common/hardware_uart/include/hardware/uart.h
+	// receive interrupt needs RTIM bit masked
+	mov r2, #(1<<6|1<<4) // RTIM | RXIM
+	str r2, [r1, #0x38] // UART: UARTIMSC
+	// set fifo level to 0
+	mov r2, #0
+	str r2, [r1, #0x34] // UART: UARTIFLS
+	bl delay
+	ldr r0, [r1, #0x3c] // UART: UARTRIS
+	bl printh
+
 loop:
+	wfe
 	b loop
 
 // functions
@@ -224,7 +238,7 @@ bled:
 delay:
 	push {r0}
 	mov r0, #1
-	lsl r0, r0, #20
+	lsl r0, r0, #24
 delay_loop:
 	sub r0, r0, #1
 	bne delay_loop