commit 0245619b46587b7d1b834254214e0ce03a23420d
parent 682ac093d29f4f118191374ff3e8bf35c8412b98
Author: Matsuda Kenji <info@mtkn.jp>
Date: Sat, 11 Mar 2023 12:05:43 +0900
refactor
Diffstat:
| M | main.s | | | 45 | +++++++++++++++++++++------------------------ |
1 file changed, 21 insertions(+), 24 deletions(-)
diff --git a/main.s b/main.s
@@ -28,18 +28,13 @@ reset_chk:
add r0, r0, #0xc4
mov r1, #5
str r1, [r0, #0]
-
// set gpio12 funct as uart_tx
ldr r0, io_bank0_base
- add r0, r0, #0x64
mov r1, #2
- str r1, [r0, #0]
-
+ str r1, [r0, #0x64]
// set gpio13 funct as uart_rx
- ldr r0, io_bank0_base
- add r0, r0, #0x6c
mov r1, #2
- str r1, [r0, #0]
+ str r1, [r0, #0x6c]
// set baud rate for uart0
ldr r0, uart0_base
@@ -64,15 +59,19 @@ reset_chk:
lsl r1, r1, #24
str r1, [r0, #0]
- ldr r0, gpio_out
- mov r3, #0
-
echo:
- b uart0_recv
- b uart0_send
+ bl uart0_recv
b echo
-loop:
+hault:
+ b hault
+
+led_blink:
+ push {lr}
+ ldr r0, gpio_out
+ mov r1, #1
+ lsl r1, r1, #24
+ mov r3, #0
// assert gpio24
str r1, [r0, #0]
bl delay
@@ -80,7 +79,7 @@ loop:
str r3, [r0, #0]
bl delay
- b loop
+ pop {pc}
delay:
mov r2, #1
@@ -91,36 +90,34 @@ del_loop:
bx lr
uart0_send:
+ push {lr}
// check if fifo is not full
ldr r1, uart0_base
- mov r2, #0x18
- add r2, r1, r2
- ldr r2, [r2, #0]
+ ldr r2, [r1, #0x18]
mov r3, #32
and r2, r3
bne uart0_send
// send data
mov r2, #255
- and r0, r2
+ and r0, r0, r2
str r0, [r1, #0]
- bx lr
+ pop {pc}
uart0_recv:
+ push {lr}
// check if fifo is empty
ldr r1, uart0_base
- mov r2, #0x18
- add r2, r1, r2
- ldr r2, [r2, #0]
+ ldr r2, [r1, #0x18]
mov r3, #16
and r2, r3
- bne uart0_send
+ bne uart0_recv
// recv data
ldr r0, [r1, #0]
- bx lr
+ pop {pc}
.align 2
